With the development of the integrated circuit (IC) technology and increasing shrinkage of device critical dimensions, various new materials and processes are being introduced in this art to satisfy the ever-changing requirements associated therewith, necessitating high-accuracy alignment between different features.
Most existing solutions developed to verify the availableness of a satisfactory alignment accuracy follow the conception of measuring alignment deviations between different features in an optical scheme. Provided that any optical system has a maximum achievable resolution, which is deemed to be exceeded by a requested resolution increasing with the continuous scaling-down of the desired electronic devices, it is considered these existing solutions are not fundamental.
FIG. 1 is a transmission electron microscope (TEM) image of a structure resulting from a process intended to form a contact connected to a gate structure and an active area. As seen from the figure, the gate structure on the left side is misaligned with the contact, rendering the whole structure defective.
In fact, even a little deviation in the alignment between the contact and gate structure, in particular, after the technology node scaling down to 65 nm or below, may lead to failure of the whole device being fabricated to which they are belonging.
Thus, there is a substantial need for a novel method capable of more accurate detection of misalignment of the gate structure.